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1 IntroductionWith the rapid development of computer technology, electronic technology and communication technology, audio processing technology has been widely used in many fields. Such as mobile phones, IP phones in the field of communications, MP3 and CD players in consumer electronics, and voice recognition, voice control systems in the control field [1]. Aiming at the powerful digital signal processing capability of DSP and the good real-time performance of ARM processor, combined with the interface characteristics of audio codec chip TLV320AIC23, this paper describes the hardware interface design and software programming of audio processing system composed of three, which provides effective and A practical audio processing system solution.
TLV320AIC23 (referred to as AIC23) is a high-performance stereo audio codec Codec chip from TI. Its integrated analog-to-digital converters (ADCs) and digital-to-analog converters (DACs) feature multi-bit Sigma-Delta technology with oversampling digital interpolation filtering. The data transfer word length is 16, 20, 24, 32 bits and supports sampling frequency range from 8kHz to 96kHz. The signal-to-noise ratio of the ADC and DAC is 90dB and 100dB, respectively. Built-in headphone output amplifier with both MIC and LINE IN input modes with programmable gain adjustment for both input and output. In addition, AIC23 has low power consumption, only 23mW in playback mode and less than 15uW in power saving mode. Therefore, AIC23 becomes a digital audio application
TMS320VC5402 (referred to as VC5402) is an excellent 16-bit fixed-point DSP of TI Company. It has fast computing speed and the instruction execution speed reaches 100MIPS. With on-chip memory and a variety of on-chip peripherals, widely used in the field of speech codec and communication [3].
The S3C4510B (4510B for short) is a low-cost, high-performance 16/32-bit reduced instruction set microcontroller from Samsung. Its excellent ARM7TDMI core and general-purpose microprocessor macrocell make it an ideal choice for custom application development. [4].
2 system hardware design
The audio processing system is mainly composed of the foregoing three processing chips: an ARM control unit, a DSP signal processing unit, and an AIC23 audio collection unit. The system block diagram is shown in Figure 1.
Figure 1 Block diagram of audio processing system based on DSP and ARM
AIC23 is a programmable chip with 11 16-bit registers inside. These registers can be programmed to obtain the required sampling frequency, input and output gain, and transmission data format. The control interface has two working modes, SPI and I2C, which are selected by the MODE pin on the chip: MODE=0 is I2C mode, and MODE=1 is SPI mode. Since the ARM 4510B also has an I2C interface, the I2C mode is selected. The I2C interface address of AIC23 is determined by the state of the pin. When =0, the address is 0011010, and when =1, the address is 0011011. SDIN and SDA are data lines, and SCLK and SCL are serial clock lines. The VC5402 has two multi-channel buffer serial ports, and the McBSP0 and AIC23 are used for communication. The signal connection is shown in Figure 1. In the figure, AIC23 operates in the main mode, and the frame synchronization signals BFSX0 and BFSR0 of the clock signal, DAC and ADC are provided by AIC23. The communication between DSP VC5402 and ARM 4510B is realized by the HPI interface on the DSP.
3 system software design
The system consists of two parts: ARM system and DSP system. ARM acts as the main controller to manage the working process of the whole system. It runs related applications and can schedule multiple tasks to complete communication with external DSP systems or other peripherals. The DSP mainly completes the acquisition and signal processing of the audio data, and sends the processed data to the ARM application program. Such a design can greatly improve the working efficiency of the system, which is also a typical design scheme of the current embedded system, each mobile handheld device such as a PDA, a mobile phone, and the like.
The specific thing to do here is to program the control interface of the AIC23 so that it works in the desired mode. Then initialize the McBSP of the DSP for AD, DA conversion and data processing.
3.1 ARM programming part
The programming of ARM in the system mainly involves the initialization of AIC23, so that it enters the normal working state, and collects and processes the audio data. This requires setting the 4510B I2C bus special function registers: control status register IICCON, prescaler register IICPS, and shift buffer register IICBUF. See Table 1 [5] for register descriptions.
Table 1 4510B I2C Bus Special Function Register
A detailed description of the 11 control register related settings of AIC23 can be found in Document 2. The settings here are: left and right channel line input mute; headphone left and right channel volume is 6dB; enable DAC, microphone volume is 20dB as ADC input; enable ADC high-pass filtering; chip part of the circuit power supply enable; chip works in the main Mode, sampling data length 16 bits, using DSP data format (synchronous frame followed by two data words); sampling rate 88.2KHz (external crystal oscillator is 11.2896MHz); enable digital interface.
The I2C bus timing for programming AIC23 is shown in Figure 2. After setting the clock frequency of I2C, first send the start condition (SDI is switched from high level to low level when SCLK is high), then send the device address of AIC23, send the address of the corresponding register of AIC23 after the device address is sent, and then Send the data set in this register, and finally send a stop condition (SDI switches from low level to high level when SCLK is high). Note that the register address here is 7 bits, the register data is 9 bits, and the I2C bus transfers data in bytes. Therefore, when programming the register of AIC23, the first byte includes the first 7-bit register address B15-B9 and the highest bit B8 of the setup data, and the second byte is the last 8 bits of the setup data B7-B0.
Figure 2 I2C timing
3.2 Audio data collection and playback
After initializing the AIC23, the DSP and McBSP0 are initialized, and audio data is collected and played. The voice signal is collected through the microphone, and is output by the earphone after being digitally filtered. The data is saved using the reception interrupt of McBSP0, and the audio data is processed by the FIR digital filtering subroutine. The program flow is shown in Figure 3.
Figure 3 audio data processing program flow chart
Initialize McBSP0 to work in coordination with AIC23. Here, the various control registers of McBSP0 should be configured according to hardware design and software requirements. The main settings of the serial port in this system are: receive data right alignment, with sign extension; receive interrupt enable; send and receive frame signals and send and receive clock signals from off-chip; transmit and receive frame sync signals are active low; Sampling the number of transmissions and receptions on the rising edge of the clock
According to ; each frame sends and receives two 16-bit word data [6].
The data receiving part can be implemented in the DSP interrupt program with the following statement:
Mvkd drr10, *ar5 ; save data
Pshd *ar5+% ; data is pushed onto the stack
Popd new_ad ; pops data from the stack to a custom register
The related procedures for FIR filtering are as follows:
Ld new_ad,a ; new data is loaded into the accumulator
Stm #1,ar0 ; double operand increment
Stm #N,bk ; set the length of the circular buffer, that is, the FIR filter level (N is the filter level)
Stl a, *ar3+% ; new data is sent to the buffer pointed to by ar3
Rptz a,#(N-1) ; repeatedly perform multiply-and-accumulate operations of N-1
Mac *ar2+0%, *ar3+0%, a ; ar2 is the coefficient pointer, the result is in the accumulator high
Sth a,temp ; save calculation results
Ld temp, a ; the result is placed in the accumulator low
...
Stlm a, dxr10 ; send the data in the accumulator status to the serial port transmit register
...
Based on the aforementioned corresponding settings for AIC23 and DSP, 21-level coefficient symmetric FIR digital filtering is used to filter the speech signal input via the microphone, and the filtering result is output by the earphone, and the actual effect is good. The collected audio data can also be transferred to the ARM application program via the HPI interface.
3.3 Speech Recognition Application Testing
The basic principle of speech recognition is to extract features from speech signals. At present, the commonly used speech recognition algorithms include dynamic time warping based on pattern matching (DTW: Dynamic Time Warping), HMM (Hidden Markov Model) based on statistical model, and neural network based recognition method (DNN, NPN, TDNN), etc. [7]. In order to facilitate system application testing, this paper uses the easiest way to debug the system, that is, the identification of English vowels. The basic principle is to extract the frequency characteristics of the vowels. Each vowel has three distinct formant frequencies in its frequency domain response, and the most easily identified is the first formant, thereby enabling effective vowel recognition. In the extraction of the first formant frequency characteristic, the "zero crossover" method is used (statistical single frame signal waveform crossing zero point - zero crossing rate), and the analysis of signal frequency characteristics is converted into time domain analysis, and the calculated zero crossing is performed. The vowel recognition can be achieved by comparing the rate with the theoretical value. Figure 4 shows the time domain and frequency domain diagrams of the vowel "A", respectively.
Figure 4 Time domain and frequency domain diagram of vowel A
From the frequency domain sampling map, the obvious first formant can be seen. At this time, the zero-crossing rate of the signal in the time-domain sampling can be used to accurately identify the vowel A. The sampling point in the calculation of the zero-crossing rate is approximately equal to zero. Weak interference can be ignored. It has been verified that the recognition rate of this simple unit sound recognition method is above 80%, which proves the practicability of the audio processing of the system.
4 Conclusion
This paper describes the design and implementation of an audio processing system based on signal processing and embedded applications. The hardware design, software programming and application of the system are discussed. Through the ARM control of the audio chip AIC23 and the communication between the DSP and the AIC23, the functions of audio signal acquisition, processing, and output, as well as simple speech recognition are realized. The application framework of audio processing system based on ARM and DSP is constructed, which provides practical software and hardware solutions for further data processing and control applications.
references
1 Zhang Dabo. Principles, Design and Application of Embedded Systems. Beijing: Mechanical Industry Press, 2004.11
2 TLV320AIC23, Stereo Audio CODEC, 8- to 96-kHz, With Integrated Headphone Amplifier. Texas Instruments Incorporated, 2002
3 TMS320VC5402, Fixed-Point Digital Signal Processor. Texas Instruments Incorporated, 2000
4 S3C4510B User's Manual. Samsung Electronics, 2001
5 Li Shuguang. Detailed Development of ARM Application System: System Design Based on S3C4510B. Beijing: Tsinghua University Press, 2004
6 TMS320C54xx McBSP to TLV320AIC24 Interface. Texas Instruments Incorporated, 2003
7 Huang Tao, Hu Bin. Non-specific person speech recognition design based on SPCE061A microcontroller. Microcomputer Information, 2006, 3-2: 19-20
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