Typically, buck regulators are designed to operate in continuous conduction mode (CCM), which simplifies the calculation of the output voltage and makes system design more straightforward. However, when a system is asynchronous and needs to function under light load conditions, the operation becomes more complex. In such scenarios, the buck regulator may switch to discontinuous conduction mode (DCM). In DCM, the duty cycle no longer follows the simple ratio of Vout/Vin but instead depends on a more complicated function involving the inductor value, input voltage, switching frequency, and output current.
During normal operation, as shown in Figure 1, the floating gate driver section of the buck controller powers up. The reference voltage, Vref, which helps improve energy efficiency, drives the NFET gate until the diode voltage drops below Vref, allowing the driver to fully activate. At startup, the output voltage is 0V, so the source (S) of the FET (Q1) is also at 0V, ensuring there is enough voltage to drive the gate (G) of the FET.
Figure 1: Buck regulator during power-up.
Under sufficient load, the system can operate normally in continuous mode. During a flyback event caused by the FET being turned off (as shown in Figure 2), current always flows through the external FET or D2 to the inductor. This flyback generates a voltage at the source of Q1 that is limited by the voltage drop across D2, potentially creating a negative voltage relative to ground. Meanwhile, the boost capacitor (Cboost) raises the gate voltage, providing enough voltage to drive Q1. The boost capacitor supplies high voltage to the boost pin and provides the necessary negative voltage to the FET’s source.
Figure 2: Flyback conditions.
When the average current demand is less than half of the current ripple during light load conditions, the system transitions into discontinuous mode. This occurs because the output current is driven by the reverse bias of D2. As a result, the output may overshoot due to the slower response of the control loop, and it may remain at that level. Additionally, the system might miss pulses due to higher voltages, making the behavior somewhat unpredictable.
The main issue lies in the circuit configuration we are reviewing. After Q1 turns off, the boost capacitor (Cboost) begins to discharge through the boost pin (Iboost), supplying current to any supporting circuits and leaking through D1, as illustrated in Figure 3. In discontinuous mode, the extended turn-off time of Q1 causes the boost capacitor to lose charge. If the voltage drops to a critical level, Q1 may fail to turn on (typically around 3V, though this can vary with components). The FET's source is usually maintained at its regulated voltage (8V in the example, depending on the output load and Cout value). Q1 will only turn on again once the output capacitor is fully discharged, and the source voltage drops sufficiently below the boost pin voltage via D1.
Figure 3: Boost capacitor discharging.
In conclusion, designers should carefully evaluate switching power supply designs under all load conditions. Temperature plays a significant role, as high temperatures increase leakage current. The temperature coefficient of the current flowing into the boost pin is not well known, so low-temperature conditions must also be considered. These factors should be included in worst-case simulation scenarios to ensure accurate system evaluation and determine the minimum required capacitance. Careful design practices can also include engineering buffers in calculations to enhance reliability.
Solutions to the issues discussed in this article include:
- Increase the value of the boost capacitor (Cboost) to prevent low-voltage discharge events.
- Use gate drivers that reference ground for better performance.
- Modify the design to operate in synchronous mode if possible.
- Adjust the reference voltage connected to D1 to optimize performance.
- Replace D1 with a low-leakage Schottky diode to reduce losses.
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