The fundamental concepts and evolution of current-mode circuits are introduced. A detailed comparison is made between the main performance characteristics of current-mode circuits and their voltage-mode counterparts. The cross-conducting ring properties and port behavior of second-generation current-controlled current transmitters (CCCII), which are widely used in various current-mode applications, are discussed. Additionally, the basic structure of a cascode current mirror is explained, and a new CMOS-based CCCII current transmitter is proposed. Based on this, a current-mode integration circuit using a current-controlled current transmitter is designed. Simulations of the output waveform under sine and square wave inputs are conducted using HSPICE software.
In traditional analog electronic circuits, voltage has long been the primary signal variable, with most circuit functions derived from processing voltage signals. This has led to the development of numerous voltage-mode circuits. However, as signal frequencies increase, the limitations of voltage-mode operational amplifiers become more apparent. One major drawback is that the product of the -3 dB closed-loop bandwidth and the closed-loop gain remains constant. As bandwidth increases, the gain decreases proportionally. Another limitation is the low slew rate, typically ranging from 0.2 to 20 V/μs, which restricts their use in high-speed applications.
Recently, the advantages of using current as a signal variable have been recognized, leading to the development of current-mode circuits. These circuits offer improved performance in terms of speed, bandwidth, and dynamic range, solving many issues encountered in voltage-mode designs.
**1. Second-Generation Current-Controlled Current Transmitter (CCCII)**
The second-generation current-controlled current transmitter (CCCII) evolved from the original CCII. However, due to parasitic resistances at the X and Y terminals of the internal circuit, the ideal voltage tracking was not achieved. In contrast, the CCCII allows the parasitic resistance at the X terminal to be controlled by internal DC bias, enabling adjustable voltage characteristics.
In 1996, Alain Fabre and colleagues proposed a CCCII based on translinear loop principles, which became the foundation for subsequent CCCII designs.
**1.1 Linear Transconductance Principle**
Translinear circuits rely on the linear relationship between the transconductance parameter of a bipolar junction transistor (BJT) and its collector current. In a closed loop with an even number of forward-biased emitter junctions arranged clockwise and counter-clockwise, the product of the emitter current densities must be equal.
For a BJT, the relationship between the collector current $ I_C $ and base-emitter voltage $ V_{BE} $ is given by:
$$
I_C = I_S \left( e^{\frac{V_{BE}}{V_T}} - 1 \right)
$$
Where $ V_T $ is the thermal voltage (~26 mV at room temperature), and $ I_S $ is the reverse saturation current. Differentiating this equation gives the transconductance $ g_m $, which is proportional to $ I_C $. In a translinear loop containing $ n $ BJT base-emitter junctions, the sum of junction voltages must be zero.
A simplified translinear loop with four PN junctions is shown, where each junction represents a BJT’s base-emitter junction, and the collector current is set accordingly.
By substituting the transconductance into the loop equations, it becomes clear that the product of the collector currents in clockwise and counter-clockwise directions must be equal, forming the basis of the translinear principle.
**1.2 CCCII Circuit Symbol and Port Characteristics**
The input and output characteristics of the CCCII can be represented in matrix form:
$$
\begin{bmatrix}
V_X \\
I_Y \\
I_Z
\end{bmatrix}
=
\begin{bmatrix}
R_X & 0 & 0 \\
0 & 0 & 1 \\
0 & -1 & 0
\end{bmatrix}
\begin{bmatrix}
I_X \\
I_Y \\
I_Z
\end{bmatrix}
$$
The X terminal is the current input, while the Y terminal is the voltage input. Unlike the original CCII, the X terminal voltage is influenced by parasitic resistance. The sign in the matrix denotes CCCII+ and CCCII-, with different current relationships.
**2. Cascode CCCII Design**
**2.1 Cascode Current Mirror**
Current mirrors are essential in current transmitters. A standard current mirror may suffer from channel-length modulation, limiting accuracy and output resistance. A cascode current mirror improves both accuracy and output resistance.
**2.2 Cascode CMOS CCCII Design Circuit**
A CMOS-based CCCII circuit uses a transconductance stage composed of MOSFETs M1–M4 and multiple current mirrors (M5–M6, M7–M8, etc.). The cascode configuration enhances output impedance and transmission accuracy. The X-terminal current is coupled to the Z-terminal through a cross-conductor loop, while the current mirrors provide biasing for the translinear loop.
**2.3 Performance Simulation of Cascode CMOS CCCII**
Using TSMC 0.18 μm CMOS process parameters, the cascode CMOS CCCII was simulated with HSPICE. The circuit operated at 1.5 V, and the relationship between $ I_Z $ and $ I_X $ was observed. The simulation confirmed high transmission accuracy and stable performance.
**3. Current-Mode Integrator Design and Simulation**
Based on the cascode CMOS CCCII, a current-mode integrator was designed by adding a resistor at the X terminal and a capacitor at the Y terminal. The output current $ I_0 $ is the integral of the input over time.
Simulations were performed using HSPICE under sine and square wave excitations, confirming the circuit's accuracy and reliability.
**4. Conclusion**
The current-controlled current transmitter is a key component in current-mode circuits. This paper proposes a cascode-based CMOS CCCII to enhance output impedance and transmission accuracy. A current-mode integrator was designed and validated through simulations. The results demonstrate high accuracy and feasibility, making the integrator suitable for replacing traditional circuits in many applications. It shows great potential for future use in high-speed and high-performance systems.
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