With the rapid development of the social economy, traffic issues caused by the surge in vehicle numbers have become increasingly severe. As a critical component of the traffic management system, traffic lights play a vital role in managing the interaction between vehicles, pedestrians, and roads, ensuring smooth and safe traffic flow.
EDA (Electronic Design Automation) is a powerful tool that leverages advanced computing to process hardware description language (HDL) files, enabling the automatic realization of electronic circuit functions. The ultimate goal of using EDA technology in electronic system design is to develop Application-Specific Integrated Circuits (ASICs). These circuits, implemented through EDA tools, serve as the physical foundation for specific electronic applications. Among the key devices used for this purpose, Field-Programmable Gate Arrays (FPGAs) stand out due to their flexibility, efficiency, low cost, ease of maintenance, and high reliability.
**1. Design Requirements**
**1.1 Application Background**
This project involves a crossroad where a main road intersects with a branch road. The main road runs east-west, while the branch road runs north-south. To ensure safe and efficient passage for vehicles, three-color signal lights—red, green, and yellow—and left-turn signals are installed at each entrance of the intersection, as illustrated in Figure 1.
**1.2 Requirements**
1. When the green light on the main road is on, the red light is off, and vice versa. They alternate to allow passage. The main road has a 40-second green light, while the branch road has a 30-second green light. During the green phase, the first 10 seconds are for left turns, followed by 5 seconds of yellow light, with the remaining time being for straight movement.
2. A countdown display function must be implemented.
3. The system should support a reset function, returning to an initial state where the corresponding indicator lights are activated.
**2. System State Analysis**
From the design requirements, the sequence of changes in the traffic lights for both the main and branch roads is outlined in Figure 2. The state transitions are detailed in Table 1.
**3. System Structure Design**
The system architecture, based on the given requirements, is shown in Figure 3. A clock pulse is generated by dividing a crystal oscillator's frequency. The main controller receives the clock signal and performs state transitions accordingly, while also outputting the duration for each state. The signal light controller manages the lights on the main and branch roads based on the state information provided. Since the time signal from the main controller is in real-time format, a quantization module is required to convert it into two sets of BCD codes for display on a digital tube.
**4. VHDL Design Implementation**
To facilitate system implementation, each module is designed using VHDL. The main controller acts as a counter, receiving a second pulse signal. It operates in a 70-cycle mode, resetting after reaching 1 and starting again. The system’s reset signal ensures the counter returns to state S0 and restarts. Below is the VHDL code for the primary controller. Here, `clk` and `rst` represent the clock and reset signals, `state` indicates the current state, `seg7a` and `seg7b` show the countdown times for the main and branch roads, and `temp` is an internal variable.
**5. Result Simulation**
Each module was connected using Quartus II software, compiled, and simulated successfully. After pin allocation, the configuration file was downloaded to the KX_7C5TP FPGA development board, and the system operated correctly, confirming the validity of the entire design. The simulation results are presented in Figures 4 and 5.
**6. Conclusion**
As demonstrated in the design, using FPGA for traffic signal control significantly simplifies the design process. Engineers can focus on software tools like HDL and EDA platforms to implement hardware functions, which enhances design flexibility and allows for easy adjustments to signal timing cycles. This approach not only improves efficiency but also offers greater adaptability for future modifications.
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