**Design Scheme Based on a Simple Digital Frequency Meter Using a Single-Chip Microcontroller (1)**
The system block diagram is shown in Figure 1. It mainly consists of the AT89C52 microcontroller, an XOR device, an LCD 1602 display, and a power supply.
Figure 4 MCU Minimal System
The overall circuit diagram of the frequency and phase meter is shown in Figure 5:Figure 5 Overall Circuit Diagram of the Frequency Phase Meter
**Design Scheme Based on a Simple Digital Frequency Meter Using a Single-Chip Microcontroller (2)** This paper uses the prescaler SAB6456A and high-speed digital divider 74HC390, combined with the new MSP430F449 microcontroller, to present a novel, fully automatic digital RF frequency measurement design.Figure 1 Signal Front-End Processing and Frequency Dividing Circuit
**Main Device Introduction** **MSP430F449 Microcontroller** The MSP430F449 features a 16-bit RISC architecture with extensive on-chip peripherals and high-capacity working registers and memory, offering a high price-to-performance ratio. Key features include: - **Ultra-low power consumption**: Operates from 1.8V to 3.6V, with multiple low-power modes and fast wake-up times. - **Strong computing power**: 16-bit RISC structure, rich addressing modes, and up to 64KB Flash program space. - **Rich on-chip peripherals**: Includes watchdog timers, comparators, 16-bit timers, serial ports, and more. - **Convenient development environment**: Supports in-circuit debugging via JTAG without the need for an emulator. **Prescaler SAB6456A** The SAB6456A is a UHF/VHF prescaler that divides input frequencies between 70MHz and 1GHz by 64 or 256, depending on the MC pin status. It offers high sensitivity and strong harmonic suppression.Figure 2 Microcontroller Peripheral Circuit
**Working Principle** The design includes two main parts: frequency division and counting. The input signal is clipped and divided by the SAB6456A, then further divided by two 74HC390 high-speed dividers. The resulting low-frequency digital signal is fed into the MSP430F449, which uses its internal 16-bit timer A for timing and counting. The timer’s continuous counting mode and rising edge capture mode allow precise frequency measurement. **Hardware Design** Figure 1 shows the front-end processing and frequency division circuit. The SN74HC390, a high-speed divider, is used to divide the signal by 1000, reducing the frequency to around 4 kHz, suitable for microcontroller counting. Figure 2 displays the microcontroller’s peripheral circuit, including the reset, power supply, and crystal oscillator circuits. The 8MHz crystal provides the timer input clock, while the 32.768kHz crystal drives the display. The 74LS373 D-type latch is used to drive the LED display. **Software Design** The divided output is connected to the microcontroller’s input. After a delay to stabilize the signal, the software opens the capture interrupt and timer A, counts N pulses, and calculates the frequency. The result is displayed after dividing by the frequency division coefficient. For lower frequencies, the LED may flicker, so fewer pulses or shorter delays are used. Dynamic scanning display is implemented by sending scan signals to each digit sequentially, ensuring no visible flicker. **Main Measurement Procedure** ```c void frequency_measure(void) { float tmp, tmp1; Key_flag = 0; // Clear the button flag P1OUT |= BIT0; Delay(1000); // Wait for signal stabilization while (1) { IE2 &= ~0x80; // Disable BT, turn off LED Firstflag = 1; // Start measuring the first pulse TACTL |= TAIE; // Enable capture CCTL1 |= CCIE; // Enable Timer A while (f_ok_flag == 0); // Wait for measurement to complete f_ok_flag = 0; if (aa1 > aa2) overflow--; tmp = aa2 - aa1; tmp1 = 40.0 / (overflow * 0.008191875 + (tmp / 8000000.0)); result = tmp1 * 0.256; IE2 |= 0x80; // Re-enable BT, LED Yanshi(2, 2); // Adjust delay parameter CCTL1 &= ~CCIE; // Disable capture TACTL &= ~TAIE; // Disable Timer A return; } } ``` **Flow Chart** The flow chart is shown in Figure 3:Figure 3 Main Program Flow
**Conclusion** The hardware and software designs have been tested and proven accurate. The instrument is cost-effective, simple in structure, and suitable for economical frequency testing. **Design Scheme Based on a Simple Digital Frequency Meter Using a Single-Chip Microcontroller (3)** The digital frequency meter measures frequency through timing and counting, dynamically displaying six digits on a 1602A LCD. It supports sine, square, and triangle waves in the range of 1 Hz to 10 kHz, with time base widths of 1 μs, 10 μs, 100 μs, and 1 ms. The single-chip microcontroller enables automatic measurement. The basic principle involves directly displaying the measured signal frequency in decimal. It automatically measures the frequency of various waveforms during a measurement cycle. **Design Idea and Frequency Calculation** The design involves dividing the signal and measuring the number of cycles of a known standard frequency within one or several periods of the measured signal. The frequency calculation formula is derived from the relationship between the measured signal period and the divided signal period.Figure 3 Digital Frequency Meter System Working Principle Diagram
**Signal Conditioning and Amplification Shaping Module** The amplification shaping system includes an attenuator, follower, amplifier, and Schmitt trigger. It converts the sinusoidal input signal into a square wave of the same frequency. The signal is divided and shaped to avoid distortion. The op-amp follower increases the input impedance, and the non-inverting amplifier adjusts the gain. The Schmitt trigger shapes the signal for counting. Since the input signal amplitude is uncertain, a signal conditioning circuit is used to transform, amplify, limit, and shape the input waveform. The circuit schematic and parameters are shown in Figure 4:Figure 7 Second Pulse Generation Circuit Schematic
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